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| 1 publication order number : lv8127t/d www.onsemi.com ? semiconductor component s industries, llc, 2014 december 2014 - rev. 2 ordering information see detailed ordering and shipping info rmation on page 23 of this data sheet. lv8127t overview lv8127t is a three-phase bipolar pwm drive pre-driver ic for n-channel high-side and low-side fets. this ic is optimized for low cost, high-efficiency drive circuits in applications that use motors with high drive currents. it offers high supply voltage capability and a high degree of flexibility. feature ? user programmable output current limit ? built-in protection circuits for over temperature (otp), under voltage lock out (uvlo), locked rotor (csd)_and output current limit. ? built-in forward/reverse direction control ? built-in 5v regulator output ? built-in 15v reference zener diode ? hall ic input ? e-brake function typical applications ? power tool specifications absolute maximum ratings at ta = 25 ? c parameter symbol conditions ratings unit supply voltage 1 v cc max v cc terminal 23 v supply voltage 2 vm max vm terminal 190 v supply voltage 3 vg max uh, vh and wh 210 v dc output current 1 i o max1 dc ul, vl and wl 50 ma dc output current 2 i o max2 dc uout, vout and wout, source current 50 ma dc output current 3 i o max3 dc uout, vout and wout, sink current 50 ma rf pin input voltage v rf max 1 v lvs pin input voltage v lvs max the pins lvs1 and lvs2 v5+0.3 v in pin input voltage v in max the pins in1, in2 and in3 v5+0.3 v hsel pin input voltage v hsel max v5+0.3 v f/r pin input voltage v fr max v5+0.3 v ei + pin input voltage v ei + max v5+0.3 v allowable power dissipation pd max * 1.1 w operation temperature topr ta ?30 to +100 ? c storage temperature tstg ?55 to +150 ? c *when mounted on the specified printed circuit board (114.3 ? 76.1 ? 1.6mm), glass epoxy stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should n ot be assumed, damage may occur and reliability may be affected. tssop36 (275mil) bi-cmos lsi 3-phase bipolar pwm dr ive pre-driver ic for brushless motor drive
lv8127t http://www.onsemi.com 2 recommended operating conditions at ta = 25 ? c parameter symbol conditions ratings unit supply voltage 1 v cc v cc terminal 12 to 18 v supply voltage 2 vm vm terminal 18 to 185 v supply voltage 3 vg the pins uh, vh and wh v cc +vm v 5v constant output current i_v5 v5 terminal ?30 ma electrical characteristics at ta = 25 ? c, vm = 48v, v cc = 16v parameter symbol conditions ratings unit min typ max current drain i cc 4 5.5 ma 5v regulator (v5 terminal) output voltage v5reg i o = ?5ma 4.7 5 5.3 v line regulation ? v5reg1 v cc = 12 to 20v 15 50 mv load regulation ? v5reg2 i o = ?5 to ?30ma 10 70 mv gate drive outputs (ufg = vfg = wfg = 0v, uh = vh = wh = 15v when v cc = 16v) *note1 low side driver high side on resistance ls ronh ul, vl and, wl i oh = ?10ma 25 35 ? low side driver low side on resistance ls ronl ul, vl and, wl i ol = 10ma 25 35 ? high side driver high side on resistance hs ronh uout, vout and, wout i oh = ?10ma 25 35 ? high side driver low side on resistance hs ronl uout, vout and, wout i oh = 10ma 10 15 ? high side dead time1 tdelay1 uout, vout and wout (see figure #x) 2.9 4 5.1 ? s low side dead time2 tdelay2 ul, vl and wl (see figure #x) 3.4 4.7 6.1 ? s pwm oscillator (pwm terminal) high level output voltage v oh (pwm) 2.75 3.0 3.25 v low level output voltage v ol (pwm) 1.0 1.1 1.2 v external capacitor charge current ichg vpwm = 2.1v ?55 ?43 ?30 ? a oscillation frequency f(pwm) c = 1000pf 15.5 20 24.5 khz amplitude v(pwm) 1.65 1.9 2.15 vp-p low voltage shutdown (lvsd) lvs1 threshold voltage vlvs1 1.8 2.0 2.2 v lvs2 hysteresis driver on resistance vlvs2l ilvs2 = 5ma 15 30 ? output leakage current ilvs2leak vlvs2 = 5v 10 ? a output current control voltage input (ei + terminal) gain (vei+/vrf) gdfsl0 v ei + ? 1.27v(typ) 0 v/v gain (vei+/vrf) gdfsl1 1.27(typ) < v ei + ? 3v(typ) 0.025 0.03 0.035 times gain (vei+/vrf) gdfsl2 3.51(typ) v ei + 3v(typ) 0.08 0.095 0.116 times reference voltage clamp v rf max v ei + 3.51v(typ) 90 105 120 mv control voltage input range vslei 0 v5 v over temperature protection (otp) otp threshold tsd design target value (junction temperature) 150 170 ? c hysteresis ? tsd design target value (junction temperature) 30 ? c *note1:gate driver output iopeak=640ma (t<20 sec duty<7% vcc=16v) continued on next page functional operation above the stresses listed in the recommended operating ranges is not implied. extended exposure to stresses beyond the recomme nded operating ranges limits may affect device r eliab ility. lv8127t http://www.onsemi.com 3 continued from preceding page parameter symbol conditions ratings unit min typ max locked rotor detect timer reference clock (csd terminal) oscillator high level output voltage v oh (csd) 2.25 2.5 2.75 v oscillator low level output voltage v ol (csd) 0.85 1.0 1.2 v external timing capacitor charge current ichg1 vcsd = 2.0v ?15 ?11 ?7 ? a external timing capacitor discharge current ichg2 vcsd = 2.0v 7 11 15 ? a oscillation frequency f(csd) c = 0.01 ? f 280 360 440 hz oscillator amplitude v(cs d) 1.3 1.5 1.7 vp-p start/brake select input (sb terminal) start operation threshold voltage v sbl 0 2.5 v brake operation threshold voltage v sbh 5.0 v cc v hysteresis ? vsb 0.15 0.3 0.45 v hall sensor inputs in1, in2 and in3 high level input voltage v ih (in) 4.0 v5 v low level input voltage v il (in) 0 1.0 v input open voltage v io (in) v5?0.5 v5 v hysteresis v is (in) 0.8 1.0 1.4 v high level input current i ih (in) v in = v5 ?10 0 10 ? a low level input current i il (in) v in = 0v ?70 ?50 ?30 ? a e-brake control input br terminal high level input voltage v ih (br) 4.0 v5 v low level input voltage v il (br) 0 1.0 v input open voltage v io (br) v5?0.5 v5 v hysteresis v is (br) 0.8 1.0 1.4 v high level input current i ih (br) vbr = v5 ?10 0 10 ? a low level input current i il (br) vbr = 0v ?70 ?50 ?30 ? a e-brake duty cycle adjust brset terminal input voltage1 vbrset1 output duty 100% 1.0 1.1 1.2 v input voltage2 vbrset2 output duty 0% 2.75 3.0 3.25 v direction control f/r terminal high level input voltage v ih (fr) 4.0 v5 v low level input voltage v il (fr) 0 1.0 v input open voltage v io (fr) v5?0.5 v5 v hysteresis v is (fr) 0.8 1.0 1.4 v high level input current i ih (fr) vf/r = v5 ?10 0 10 ? a low level input current i il (fr) vf/r = 0v ?70 ?50 ?30 ? a hall select hsel terminal ? selects angular spacing of sensors in the target motor high level input voltage v ih (hsl) 4.0 v5 v low level input voltage v il (hsl) 0 1.0 v input open voltage v io (hsl) v5?0.5 v5 v high level input current i ih (hsl) vhsel = v5 ?10 0 10 ? a low level input current i il (hsl) vhsel = 0v ?70 ?50 ?30 ? a 15v reference zener diode (v15 terminal) output voltage1 v_v15_1 io = ?100ua 15.8 17.2 18.2 v output voltage2 v_v15_2 io = ?1ma 15.8 17.8 19.2 v product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product per formance may not be indicated by the electrical characteristics if operated under different conditions. lv8127t http://www.onsemi.com 4 package dimensions unit : mm fig.1 tssop36 5.6x9.75 / tssop36 (275 mil) case 948bc issue a soldering footprint* note: the measurements are not to guarantee but for reference only. *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. (unit: mm) 7.00 0.30 1.00 0.50 xxxxx = specific device code y = year m = month ddd = additional traceability data generic marking diagram* xxxxxxxxxx ymddd lv8127t http://www.onsemi.com 5 fig2 pin assignment 36 brset 35 br 34 in3 33 in2 32 in1 31 sb 30 v5 29 v cc 28 v15 27 lvs1 26 lvs2 25 gnd2 24 n.c 23 n.c 22 n.c 21 uh 20 uout 19 ufg 1ei + 2gnd3 3pwm 4csd 5f/r 6hsel 7gnd 8rfgnd 9rf 10 ul 11 vl 12 wl 13 wfg 14 wout 15 wh 16 vfg 17 vout top vie w 18 vh fig.3 0 0.3 0.9 1.2 0.6 1.10 0.44 1.5 -- 30 0 90 60 30 120 pd max -- ta ambient temperature, ta -- ? c allowable power dissipation, pd max -- w mounted on the specified board: 114.376.11.6mm 3 glass epoxy lv8127t http://www.onsemi.com 6 three-phase logic truth table these tables apply to the position sensor spacing of the motor, either 60 or 120 (1) 120 ? (hsel=?h?) f/r=?l? f/r=?h? in1 in2 in3 in1 in2 in3 upper gate lower gate 1 h l h l h l vout ul 2 h l l l h h wout ul 3 h h l l l h wout vl 4 l h l h l h uout vl 5 l h h h l l uout wl 6 l l h h h l vout wl (2) 60 ? (hsel=?l?) f/r=?l? f/r=?h? in1 in2 in3 in1 in2 in3 upper gate lower gate 1 h h h l l l vout ul 2 l h h h l l wout ul 3 l l h h h l wout vl 4 l l l h h h uout vl 5 h l l l h h uout wl 6 h h l l l h vout wl lv8127t http://www.onsemi.com 7 block diagram + vm hsel pre driver curr lim control logic gnd + + v5 ei + pwm gnd speed control lvsd comp sb sb v5 5vreg 60 /120 pwm osc sb hall logic tsd ref osc hall hys comp uh lvs2 lvs1 1 2 3 1:on 2:lock 3:off to sb gnd ufg uout ul hall bias v15 v cc in3 rfgnd in2 in1 f/r f/r in csd f/r csd osc br brset e-brake gnd2 gnd3 + vh vfg vout vl + wh wfg wout wl rf v cc hall bias fig.4 lv8127t http://www.onsemi.com 8 pin function pin no. pin name function equivalent circuit 1 ei + integral amplifier non-inverting input pin for voltage control. used for anal og torque control. v5 res 1 500 ? 2 gnd3 ground pin grounding pin 3 pwm set pwm oscillation frequency. connect a capacitor between this pin and gnd. 3 v5 200 ? 1.0k ? 4 csd sets the detection time of locked rotor protection circuit. connect a capacitor between this pin and gnd. 4 500 ? v5 5 f/r direction (forward/reverse) control pin. forward = 1, reverse = 0 internal pull-up resistor 1k ? 100k ? v5 5 6 hsel selects the position sensor spacing. (either 120 ? of 60 ? ) hsel = ?h? for 120 ? hsel = ?l? for 60 ? internal pull-up resistor v5 6 1k ? 100k ? 7 gnd ground pin grounding pin continued on next page. lv8127t http://www.onsemi.com 9 continued from preceding page. pin no. pin name function equivalent circuit 8 rfgnd current sensing kelvin reference pin. this pin is connected to the gnd side of the current sense resistor. this pin should be routed with rf to eliminate voltage drops in the sensing circuit due to pcb trace resistance. a dedicated trace should be used between this pin and the high side of the sense resistor. 8 5k ? v5 v cc 9 rf current sensing kelvin input pin. this pin is connected to the external current sense resistor and should be routed closely with rfgnd to eliminate voltage drops in the sensing circuit due to pcb trace resistance. a dedicated trace should be used between this pin and the high side of the sense resistor. 9 5k ? v5 v cc 10 11 12 vl ul wl . low side fet drive pins for the three phases. duty cycle driven. v cc 10 11 12 13 16 19 wfg vfg ufg motor phase voltage monitor pins. used by the ic to determine the state of each switch node. 14 17 20 15 18 21 13 16 19 14 17 20 wout vout uout high side fet drive pins for the three phases. 15 18 21 wh vh uh drive boost pins for the three phases. used as the high side gate voltage source. attached to a simple diode-capacitor boost circuit. 25 gnd2 ground pin ground pin continued on next page. lv8127t http://www.onsemi.com 10 continued from preceding page. pin no. pin name function equivalent circuit 26 lvs2 open drain pull-down to add hysteresis to low supply voltage protection (lvsd) comparator. external resistor value determines hysteresis. v5 26 27 lvs1 low supply voltage protection (lvsd) comparator input. external resistor divider sets the actual falling edge threshold for low supply voltage protection (lvsd). 27 500 ? v5 28 vi5 reference zener diode (15v nominal). used with an external pull-up as a reference for a 15v bjt emitter follower-based regulator. typically a diode drop above 15v to allow 15v to appear at the bjt emitter. 300 ? 28 29 v cc power supply pin. connect a capacitor between this pin and gnd for stabilization. 30 v5 stabilizing pin for 5v regulator. connect a capacitor between this pin and gnd for stabilization. (about 0.1 ? f) v cc 30 31 sb logic input for shorted braking sb = 0v for normal operation. sb >= 5v (nominal)for shorted braking assertion v cc 31 2k ? continued on next page. lv8127t http://www.onsemi.com 11 continued from preceding page. pin no. pin name function equivalent circuit 32 33 34 in1 in2 in3 hall input pin internal pull-up resistor. connect a capacitor between this pin and gnd for signal noise reduction. v5 32 33 34 1k ? 100k ? 35 br logic input for e-brake control. internal pull-up resistor. (controls the regenerative brake function) when the br pin is open (high) then the motor is allowed to rotate without braking. when the br pin is pulled low, braking is active. v5 35 1k ? 100k ? 36 brset analog control voltage input for e-brake adjustment. controls the duty cycle of the brake circuit. a lower voltage on brset will increase the duty cycle of the brake circuit. 36 v5 500 ? 22 23 24 nc nc nc the nc pins have no internal connections and can be used for layout purposes. lv8127t http://www.onsemi.com 12 hall input ? drive out put timing chart (3-phase hall input ph ase difference : 120 ? ) fig.5 fig.6 in1 in2 in3 pwm output ul vl wl uout vout wout hall input hsel= ? h ? 120, f/r= ? l ? pre-input in1 in2 in3 pwm output ul vl wl uout vout wout hall input hsel= ? h ? 120, f/r= ? ? lv8127t http://www.onsemi.com 13 hall input - drive output timing chart (3-phase hall input phase difference : 60 ? ) fig.7 fig.8 in1 in2 in3 pwm output ul vl wl uout vout wout hall input hsel= ? l ? 60, f/r= ? l ? pre-input in1 in2 in3 pwm output ul vl wl uout vout wout hall output pre-output hsel= ? l ? 60, f/r= ? h ? lv8127t http://www.onsemi.com 14 lv8127 operation the lv8127t is a self-contained motor driver for three pha se brushless dc (bldc) motors using external n-channel fet?s for the power driver stage. it supports three half-bridge fet configurations including the upper and lower fet drives for all six fet?s. this part controls motor current as a function of the control voltage applied at the input. it has various protection features built in, including over temperat ure (otp), locked rotor(csd) and low voltage shutdown (lvsd). position sensing uses external hall effect sensors, either moto r mounted or from an external circuit. these sense inputs determine which pair of output drivers should be active, with two bridges active and one inactive for each of three physical segments of rotation. two sections active will driv e a motor in a particular direction and sequencing all three phases will generate continuous rotation. direction of rotation is accomplished by changing the sequence of the three drive phases. effective coil current is controlled with pwm drive of the nfet?s in a linear mode for best efficiency. the part has built-in boost circuits for each bridge to generate adequate drive amplitude for upper nfets. the pwm reference is a sawtooth wave generated on chip. the pwm frequency can be set with a capacitor on the pwm pin. the pwm duty cycle is determined by the input control voltage at ei+, which is used to set the motor current. the modulator has a piecewise linear variable ga in with low gain (0.03v/v) below 3v at ei+ and a higher gain (0.1v/v) as the input voltage exceeds 3v. above 3.5v the gain is dropped to zero to eliminate any furthe r increase in duty cycle. motor current is monitored as a small voltage generated across an external resistor in the common h-bridge lower leg. this voltage is sensed differentially with both leads treated as kelvin leads and brought inside the lv8127t to an internal amplifier. pwm output is then generated by combining the pwm reference waveform, the modulation input and the current (error) information to generate a varying duty cycle. this varying wi dth pulse train is applied to th e active pair of h-bridges to generate a varying current and thus a rotating flux field to turn the rotor. the strength of the flux field is proportional to the duty cycle. two types of braking are supplied. both would be considered dynamic braking, the difference between the two being whether or not regeneration is utilized. shorted braking, also called motor plugging, occurs in a motor when the field windings are intentionally shorted such that each coil sees a very low impedance termination. usually both ends are grounded or shunted with a shorting bar. this produces very high winding currents if the rotor is m oving through a magnetic field such as exists in the pm motors in common use. this high current in turn generates a large force in the opposing direction that is manifested as an opposing torque, or braking effect. this type of braking is most effective when the rotor is turning at high speed and least effective at low speeds. this controller generates shorted braking action by turning on the lower legs of all three half bridges and turning off all upper legs. this ?shorts? all windings to ground and allows high circulating currents in each winding until the rotor stops. when stopped the windings no longer have current and the power consumed is minimized. shorted braking or plugging does put high electrical stresses on the windings and should be used to stop a rotor, not to slow or control speed. regenerative braking can also be used with this controller, called e-brake in this document. in regenerative braking the pwm signal remains active and is reduced to slow the motor. if the motor is being externally driven by another device or simply by an inertial load it is considered to be in an over -run state where the rotation is generating more energy than the drive section is supplying. in this case the fet structure will sink energy rather than source energy. current can then flow from the motor to the power supply or battery regenerating energy from the kinetic energy of the mechanical system. this feature can come into play if the motor we re driving a vehicle such as a bicycle. regenerative braking is excellent for slowing or controlling speed as it recovers energy and is more efficient. care must be taken to ensure the power source is capable of sinking current as well as sourcing current. protection feature sensor information is derived from the drive inputs such as motor current and position sensing and affects the operation by contributing to the control block. die temperature is monitored and also affects overall control. lv8127t http://www.onsemi.com 15 u/v/wout r1 r2 c1 q1 q2 r4 u/v/wl r3 c2 u/v/woutpin voltage u/v/wl pin voltage q1 gate dead time1 q2 gate r3&c2 value large small large small dead time2 r1&c1 value large small r1&c1 value large r3&c2 value u/v/wout r1 r2 c1 r4 u/v/wl r3 c2 d1 q1 gate at d1 attached large r1&c1 value gate discharge by diode 1. cycle-by-cycle current limit current limit is detected as a voltage di fference across the sense resistor greater than the internal reference of 0.1v. if the current desired is quite high or the sense resistor is large the voltage across the se nse resistor can be scaled down with an external resistor divider. a small cap should be placed across the sense resistor for noise suppression. when current limit is detected the inform ation is sent to the control logic which reduces the duty cycle to reduce the current. rf pin current detection resistor 3k ? 1k ? rfgnd pin rf pin current detection resistor rfgnd pin fig.9 fig.10 fig.11 lv8127t http://www.onsemi.com 16 2. pwm oscillator circuit the pwm frequency is determined by the value of the capacitor c connected to the pwm terminal. f pwm = 1/(50000 ? c) a 1000pf capacitor would yield about 20khz the power loss in the output stage will increase when the pwm frequency is too high due to switching losses during transitions. when the pwm frequency is too low, the sw itching will cause acoustic noise in the motor. the recommended pwm frequency is between 20khz and 40khz. to prevent acoustic, electri cal, commutation noise and other adverse effects, route the gnd term inal of the capacitor as close as pos sible to the gnd terminal of the ic. 3. control method this ic adopts the current feedback method which reduces output current ripple that would cause acoustic noise in the motor. the current control voltage is applied to an am plifier with gain characteristic as shown below. the user applies a current control voltage (1.3v to 3.6v) to the ei + pin . gain of control circuit is typ = 0.03v/v when the voltage on the terminal ei + terminal is less than 3v and typ = 0.1v/v when it is higher.). this generates the reference voltage against which the curr ent feedback voltage applied to the rf pin is compared. current control function a) vei+ < 3v b) 3v vei+ 3.6v vrf = (vei+ ? 1.27) gdfsl1 (v) vrf = (vei+ ? 3)gdfsl2+0.0519 (v) driving gain: gdfsl1 = 0.03 (times) driving gain:gdfsl2 = 0.095 (times) i = vrf/rf (a) i = vrf/rf (a) rf( ? ):current sense resistor value rf ( ? ) : sense resistor example(typ model) example (typ model) when the sense resistor is 10m ? , when the sense resistor is 10m ? vei+ = 2v vei+ = 3v vrf = (2 ? 1.27) 0.03 = 0.0219 (v) vrf = (3 ? 3) 0.095 + 0.0519 = 0.0519 (v) i = vrf/rf = 0.0219/0.01 = 2.19 (a) i = vrf/rf = 0.0519/0.01 = 5.19 (a) vei+ = 2.8v vei+ = 3.3v vrf = (2.8 ? 1.27) 0.03 = 0.0459 (v) vrf = (3.3 ? 3) 0.095 + 0.0519 = 0.0804 (v) i = vrf/rf = 0.0459/0.01 = 4.59 (a) i = vrf/rf = 0.0804/0.01 = 8.04 (a) vei+ = 3.5v vrf = (3.5 ? 3) 0.095 + 0.0519 = 0.10415 (v) i = vrf/rf = 0.10415/0.01 = 10.415 (a ) fig.12 v ei + v rf 1.27v (typ) 0.1 gain=0.03 14 0 23 < control gain as a function of ei+ and vrf > 0.08 0.06 0.04 0.02 (v) (v) vei+ terminal voltage (v) gain=0.095 a) vei+<3v c) 3.6v lv8127t http://www.onsemi.com 18 5. position input signal (hall effect sensors) typically the position input signal is generated by a hall effect sensor at the rotor. these signals are usually supplied as open-drain outputs (but may also be supplied via an external buffer). although the hall output often has an internal pullup resistor of around 100k it is common practice to add an external pullup of a lower value at the controller to reduce noise effects. if the hall effect output is supplied by a voltage source above 5v a zener clamp or voltage divider is used to reduce the signal level for controller compatibility. although the contro ller input is a schmitt inverter with around 1.0v of hysteresis a capacitor is sometimes added for more noise immunity. if all hall effect sensors are high at the same time all outpu t drives are turned off as it is a clear error condition. 6. low voltage shutdown circuit the voltage applied to the terminal lvs1 is monitored by the low voltage shutdown circuit. lvs1 is compared internally with a 2v reference and considered to be a low input voltage condition if below 2v. all outputs will be turned off while this state exists. lvs1 is the comparator non-inverting input and lvs2 is the comparator output. this allows an external resistive network to introduce the amount of hysteresis desired. if this circuit operation is not desired the lvs1 input shoul d have a voltage attached such that: 2v < lvs1 <5v leaving lvs1 open is always det ected as an under voltage state. the upper and lower hysteresis levels are calculated as: detection voltage ? (2.0/r2) ? (r1 + r2) release voltage ? (2.0/rx) ? (r1 + rx) * rx = (r2 ? r3)/(r2 + r3) if, for example, r1 = 160k ? , r2 = 8.2k ? and r3 = 150k ? , then the detection voltage is about 41.0v and the release vo ltage is about 43.2v with a hysteresis loop of about 2.2v 15v hall ic in 5v ic fig.14 fig.15 fig.13 lvs1 lvs2 2v ic vm uh uout ufg gate driver equivalent load circuit boot voltage = 12v 28k 180 a + lv8127t http://www.onsemi.com 19 there is no hard internal threshold at which logic is shutdown as that decision should be a part of the lv shutdown consideration. in the event vcc drops below the specified 12v minimum recommended operation it is possible to maintain logic operation at lower voltages down to around 10v, but this level is in no way guaranteed nor tested in manufacturing and is not recommended for normal operation. 7. sb (start/brake) circuit this pin is used to enable the motor driver. ? when the terminal sb is connected with gnd ? normal operation mode. ? when the terminal sb is set above 5v ? shorted brake mode the output of ul/vl/wl is set to ?high? in the shorted br ake mode. all the lower output mos-fets are turned on. (note that even in the shorted brake mode, the motor will ?coast? if br is ?high?, and will brake if br is ?low?). 8. power supply stabilization since this ic has a switching drive system, noise is easily generated in the power line. therefore connect a capacitor with suff icient capacitance between the terminal v cc and gnd for stabilization. when a diode is to be inserted on the power line to prevent damage from reverse connection of power supply, it is necessary to choose a large diode size because noise is easily generated on the power line. 9. stabilization of the regulator output voltage a capacitor of 0.1 ? f or more should be connected between the terminal v5 (5v : control circuit power supply) and gnd. the gnd terminal of the capacitor should be as close to the ground terminal of the ic as possible. the v5 terminal can be used to supply external loads of up to 30ma. however, if a larg e load current is applied, it should be confirmed that the temperature rise of the ic is not excessive. 10. direction control: forw ard/reverse operation (f/r ) if the direction is changed while the motor is rotating, m easures to prevent the shoot-through current in the output stage are used. however, a current of more than the current limit value may flow to the output transistor s because of the large motor bemf. power fets that can survive this large current must be chosen if it is expected to change direction while the motor is rotating. 11. locked rotor protection (csd) to protect the motor and the ic in the locked rotor condition this ic has built-in locked rotor protection. if the hall input signal is not switched for a given length of time in the motor drive state, the outputs on the on side (uout, vout and wout) are turned off. the time is set by the value of capacitor conn ected to the csd terminal. set time (s) = 33 ? c ( ? f) when the capacitor of 0.01 ? f is connected, the protection tim e becomes about 0.3 seconds. the set time must be adequate for the motor start-up time. this function generates the initial reset pulse, the logic circuit goes into a reset and the speed can not be controlled until this time expires. therefore, if the locked rotor protection circu it is not used connect a resistor of about 150k ? and a capacitor of about 4700pf in parallel between the terminal csd and gnd. to release the state of the locked rotor protection, either of the following operation is necessary. ? ei + input is reduced to 1.1v or less. ? the power supply is removed and re-applied. 12. switching function of hall input phase (60 ? /120 ? ) the switching of the three hall input phase difference (between 120 ? and 60 ? ) can be performed by the terminal hsel. ? hsel = ?high? : 120 ? ? hsel = ?low? : 60 ? lv8127t http://www.onsemi.com 20 13. e-brake function (br and brset) when the br pin is set low the ic enters the e-brake mo de. the lower mosfet?s short the motor coils in phase as defined by the voltage on the brset pin. (shorted brake: all the output low-side mos-fet are turned on.) the braking strength is continuously adjustable by supplying a pwm drive signal to the low-side fets. the duty cycle is set by the voltage at the brset pin over a range of 1.1v (100%) to 3.0v (0%).(see fig.16,17) figure a) shows normal motor rotation. in this case, it drives from upper side of out_u to lower side of out_v. figure b) shows the shorted brake mode. the current recirculates in the low-side fet. figure c) shows the all off mode. the current flows through the body diode of the high-side fet of out_v to vm. fig.17 14. gate driver current calculation example: gate drive is a function of internal fet rds and vcc as this voltage is applied to the gate relative to the external fet source. for the lower fet drive the circuit is simple. fo r the upper fet drive vcc is added to the output voltage at u,v,w output nodes by the boost voltage action. ipeak is then simply ipeak = vcc/rds. an example: the typical upper internal drive is 58 ? , including the fet rds. if vcc = 14.9v, ipeak = vcc/rds = 14.9v/58 ? = 255ma illustration of a fet driver output loaded with a single heavy capacitance showing the peak value. fig.16 lv8127t http://www.onsemi.com 21 illustration below shows typical output phase fet turn-on for an nvmfs5844 driven into a 19a resistive load by the lv8127t. gate drive current reaches 281 ma while drain transitions from zero to 19a ch1 5v/div ch2 90ma/div time 2.5 ? sec/div lv8127t http://www.onsemi.com 22 waveform of synchronous rectification (diode emulation). during a pwm switching cycle the low side power fet is tu rned on during the pwm off cycle to shunt motor energy back to the supply. without this action the energy is forced through the fet body diode and is dissipated rather than recovered. note the high side gate drive is aligned with the beginning of each pwm cycle. the low side switch is active during the pwm off time. a small deadtime is inserted between the gate turn-ons to eliminate possible destructive current shoot-through. layout and circuit design considerations output drive circuit ? ? short recovery time diodes should be used in th e fet gate drive circuits to reduce/eliminate short shoot-through current spikes. hf ringing across the bridge pairs can be effectively suppressed with a 0.1 uf cap mounted immediately beside the fets as shown in the application schematic of fig.4. ? the gate conditioning resistors and capacitor in the application schematic allow the gate drive to be customized for a specific application by controlling gate transition slew rates. this allows the user to optimize the tradeoff betw een noise and efficiency according to the application. ? notice the effects of the various fet drive components in the diagram of fig.9. these networks allow considerable adjustment of fet rise and fall times to eliminate ringing, harmoni c content and power losses. ? notice the effects of the gate discha rge diode d1 in the diagram of fig.9. the accuracy of the current li mit value is assured by kelvin connection of the rfgnd and rf sense terminals to the current sense resistor. when a current se nse resistor with very small resistance value is used, the pcb trace resistance value for each phase should be matched. when the trace resistance for each phase is different, the current limit value changes at every change of phase. theref ore, motor vibration and noise may occur. lv8127t http://www.onsemi.com 23 on semiconductor and the on logo are registered trademarks of semiconductor components industries, llc (scillc) or its subsidiaries in the united st ates and/or other countries. scillc owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. a lis ting of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf . scillc reserves the right to make changes with out further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any parti cular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specific ations can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated fo r each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc pro ducts are not designed, intended, or authorized for use as com ponents in systems int ended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees ar ising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that sci llc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject t oall applicable copyright laws and is not for resale in any manner. ordering information device package shipping (qty / packing) LV8127T-TLM-H tssop36 (275mil) (pb-free / halogen free) 1000 / tape & reel lv8127t-mpb-h tssop36 (275mil) (pb-free / halogen free) 48 / fan-fold |
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